Nick Race02 March 2008, 8:27 PM
We’ve been talking about Intel’s switch to 45nm process technology and the Penryn processors for a long time here at APC. After all those words, we finally have them in hand. The replacement (quite soon, I must add) for the Clovertown Xeon processors (which impressed us in APC June, page 32) is the new Harpertown Xeon processors, and there’s plenty going on under the hood.
After taking delivery of an ominously heavy box from the lads at Intel Oregon consisting of a Stoakley platform server made by Supermicro. This server contains two Harpertown processors, now officially named X5472, running at 3.0GHz, 8 x 2GB of Nanya-branded FB-DIMMs at 800MHz for a total of 16GB, twin Seagate Cheetah 15K RPM SAS drives with an Adaptec 3805 Unified controller.
Stoakley and Seaburg
Stoakley is the platform that’s going to be invading DP servers and workstations in the next few months as availability of the Harpertown Xeons ramps up. Stoakley consists of Seaburg, Intel’s new MCH (northbridge), and the older Intel 6321 ESB ICH (southbridge). Seaburg adds memory bandwidth to the platform over Bensley with 1,600MHz frontside bus support to each CPU socket and an 800MHz FB-DIMM speed jump to match.
It’s not a one-trick pony, though; Seaburg adds more PCI Express 2.0 lanes and a 24MB 96-way associative snoop filter, which handles coherency between the cache on each pair of cores. This reduces the load on the front side bus, as the snoop filter removes the traffic from the FSB as the CPUs check each other’s cache for coherency. Less overhead on the FSB means more effective memory bandwidth usage and a faster system overall.
Harpertown
Harpertown is the jewel in this new platform. It’s the 45nm processor out of Intel in the Penryn family. This represents the last die shrink we’ll see before a microarchitecture revamp in two years (Nehalem). Moving to 45nm allows Intel to reduce power consumption and theoretically get more chips per wafer. Harpertown is also the poster-child for Intel’s new manufacturing process using high-K dielectrics and metal gates. This reduces power leakage and consumption, increasing the speed of the transistor switching.
The Harpertown processors include 12MB of L2 cache (6MB per pair). The cache is mirrored in the Seaburg snoop filter, allowing a reduction in traffic across the FSB.
Another big step is the introduction of new SSE instructions, bringing the version up to SSE4. SSE4 includes 47 new instructions, improving performance for “graphics, video encoding and processing, 3-D imaging and gaming”, according to Intel’s white paper.
Performance
It’s all well and good to know the specs of a new processor, but sitting down with a server is the only way you can judge if there is really an improvement. We spent many hours poring over our Harpertown/Stoakley test setup, running environments of Windows 2003 Server, Vista Business and Longhorn betas — 64-bit versions, naturally.
We tested the platform using some old, faithful (and some newer) benchmarks. We included runs of Cinebench, Linpack (for Windows, Intel-optimised), Monte Carlo calculations using SunGard Adaptive Analytics software and synthetic benchmarks for stressing memory bandwidth with SiSoft Sandra. Though our test server arrived too late to put it side by side with the Barcelona test machine, we’ve run most of the same tests to give you an idea on how well it stacks up against AMD’s newest and Intel’s Clovertown Xeons.
Sandra’s Dhrystone arithmetic test clocked 110,876MIPS, beating out the previous-generation Clovertown by over 30,000. FPU results were almost doubled, earning 80,725 to Clovertown’s 48,200MIPS. SSE testing in Sandra did more than double the result, earning 794,944inst/s, while cache latency dropped from 7ns for 64k and 8ns for 256k down to 5.1 and 5.7ns, showing off the speed of the Seaburg chipset. Cinebench shows just how much Harpertown reigns over the last generation. Cinebench 10 rendering saw a single core render the test image in four minutes, one second, while all eight cores got it down to 40 seconds.